As is known, many pourable food products (e.g. fruit or vegetable juice, pasteurized or UHT (ultra-high-temperature treated) milk, wine, etc.) are sold in packages made of sterilized packaging material.
A typical example of this type of package is the parallelepiped-shaped package for pourable food products known as Tetra Brik Aseptic®, which is made by folding and sealing laminated strip packaging material.
The laminated packaging material comprises layers of fibrous material, e.g. paper, covered on both sides with heat-seal plastic material, e.g. polyethylene. In the case of aseptic packages for long-storage products, such as UHT milk, the side of the packaging material eventually contacting the food product inside the package also has a layer of oxygen-barrier material, e.g. aluminium foil or EVOH film, which in turn is covered with one or more layers of heat-seal plastic material.
As is known, packages of this sort are produced on fully automatic packaging machines, of the type shown in FIG. 1, on which a continuous vertical tube 2 is formed from a web 3 of the packaging material. The web is sterilized on the packaging machine 1, e.g. by applying a sterilizing agent such as hydrogen peroxide, which is subsequently removed, e.g. evaporated by heating, from the surfaces of the packaging material; and the sterilized web 3 is maintained in a closed, sterile environment, and is folded and sealed longitudinally to form tube 2.
Tube 2 is then filled downwards with the sterilized or sterile-processed pourable food product, by means of a fill pipe 4 extending inside tube 2 and fitted with a flow-regulating solenoid valve 5, and is fed by known devices along a vertical path A to a forming station 6, where it is gripped along equally spaced cross section by two pairs of jaws. More specifically, the pairs of jaws act cyclically and successively on tube 2, and seal the packaging material of tube 2 to form a continuous strip of pillow packs 7 connected to one another by transverse sealing strips.
Pillow packs 7 are separated from one another by cutting the relative sealing strips, and are conveyed to a final folding station where they are folded mechanically into the finished parallelepiped shape.
In the case of aseptic packages with a layer of aluminium as the barrier material, the tube is normally sealed longitudinally and transversely by an induction sealing device, which induces parasitic electric current in the aluminium layer to locally melt the heat-seal plastic material. More specifically, for transverse sealing, one of the jaws in each pair comprises a main body made of non-conducting material, and an inductor housed in a front seat in the main body; and the other jaw is fitted with pressure pads made of pliable material, such as rubber.
When the relative pair of jaws grips the tube, the inductor is powered to seal a cross section of the tube by heat sealing the plastic cover material. When powered, the inductor generates a pulsating magnetic field, which in turn produces parasitic electric current in the aluminium sheet in the packaging material from which the vertical tube is made, thus locally melting the heat-seal plastic cover material.
More specifically, in addition to the inductor, the induction sealing device also comprises a signal source supplying a continuous or pulsating alternating power signal; and an impedance matching circuit interposed, to optimize power transfer, between the signal source and the inductor. More specifically, the impedance matching circuit is configured to eliminate or minimize the phase shift (angle), induced by the reactive impedance of the inductor, between the voltage and current supplied by the signal source, and so minimize the reactive power supplied by the signal source, and maximize the active power.
The alternating power signal conveniently comprises a sinusoidal voltage of roughly 535 kHz frequency and a peak amplitude of around a few hundred volts, normally 540 V. And the signal source supplies a maximum power of about 2500 Watts, when the phase between the current and voltage (both measured at the output) is close to zero.
Known matching circuits are normally inductive-capacitive types, in which a variable-capacitance capacitive element—normally defined by a number of selectively parallel-connectable capacitors—is parallel-connected to an inductive element normally defined by a transformer. The total capacitance of the capacitive element and the inductance of the inductive element are so selected as to rephase the output current and voltage from the source, i.e. to achieve a close to zero phase between the current and voltage.
Since phasing depends on the electric load connected to the source, and the electric load depends on the operating conditions of the packaging machine—such as the volume of the packs produced, the type of inductor employed, the production capacity and speed of the packaging machine, etc.—phasing is real-time adapted to variations in the electric load by acting accordingly on the impedance matching circuit. More specifically, during the package production process, a control stage, which may conveniently be integrated in the source, measures, in known manner not described in detail, electric parameters, such as the phase between the voltage and current from the signal source, and/or the impedance “seen” by the signal source, i.e. the input impedance of the impedance matching circuit, and determines the total capacitance required of the impedance matching circuit to eliminate or minimize the phase between the current and voltage of the source. After which, the control stage generates and supplies the impedance matching circuit with a control signal to modify the parallel connection configuration of the capacitors and so adjust the capacitance “seen” by the signal source.
A known induction sealing device is described, for example, in the Applicant's European Patent EP-B1-1 620 249, and its circuit architecture illustrated by way of reference in FIG. 2, in which 10 indicates the induction sealing device as a whole, 11 the impedance matching circuit, 12 the signal source, and 13 the inductor.
More specifically, impedance matching circuit 11 comprises:                two input terminals 11.1, 11.2, to which signal source 12 is connected, in use, and at which the alternating power signal S(ω) supplied by the signal source is present;        two output terminals 11.3, 11.4, to which inductor 13 is connected in use;        a first and a second line 23, 24 connected to respective input terminals 11.1, 11.2 of impedance matching circuit 11;        fixed-capacitance stage 26 shown schematically in FIG. 2 by an equivalent capacitor Ceq connected between first line 23 and second line 24;        a variable-capacitance stage 21 defined by a number of—in the example shown, four—capacitive modules 21.1, 21.2, 21.3, 21.4 parallel-connected between first line 23 and second line 24, and each comprising a capacitor C1, C2, C3, C4 and a controlled switch SW1, SW2, SW3, SW4 connected in series; each controlled switch being selectively activated individually to connect the respective capacitor between first and second line 23, 24;        a transformer 25 having a primary winding 25.1 connected between first line 23 and second line 24, and a secondary winding 25.2 connected to output terminals 11.3, 11.4; and        a control stage 22 for controlling the operating status (on/off) of switches SW1-SW4, and which is configured to measure, in known manner not described in detail, the phase between the voltage and current supplied by signal source 12, to determine the target capacitance required of impedance matching circuit 11 to eliminate or minimize the phase between the current and voltage, and to generate and supply switches SW1-SW4 with respective control signals to modify the connection configuration of capacitors C1-C4 between the first and second line, and so adjust the capacitance of variable-capacitance stage 21 and, hence, the equivalent capacitance “seen” by signal source 12.        
A more detailed circuit diagram of impedance matching circuit 11 is shown in FIG. 3, which only shows the parts necessary for a clear understanding of the present invention, and in which component parts corresponding to those of the FIG. 2 impedance matching circuit are indicated using the same reference numbers.
More specifically, in the FIG. 3 impedance matching circuit 11:                input terminals 11.1, 11.2 are defined by four pairs of terminals, one pair of which is connected, in use, to signal source 12 (not shown), and another pair of which is connected, in use, to a respective pair of intermediate sockets of primary winding 25.1 of transformer 25 (not shown) to produce a specific transformation ratio;        in fixed-capacitance stage 26, equivalent capacitor Ceq in FIG. 2 is defined by three capacitors C5, C6, C7;        in variable-capacitance stage 21, each controlled switch SW1-SW4 comprises:                    a pair of input terminals SWa, SWb, to which a respective control signal supplied by control stage 22 is applied in use;            a pair of power transistors—in the example shown, insulated gate bipolar transistors—IGBT1, IGBT2, having the gate terminals connected to each other, the emitter terminals connected to each other, and the collector terminals connected, one to first line 23, and the other to second line 24 via a respective capacitor C1-C4; each power transistor also having a respective freewheeling diode D1, D2 parallel-connected to the power transistor, and with the anode connected to the emitter terminal, and the cathode connected to the collector terminal; and            a bias and filter module 27 interposed between input terminals SWa, SWb of controlled switch SW1-SW4 and the two power transistors, and defined by a resistor R and a Zener diode Z series-connected between input terminals SWa, SWb of controlled switch SW1-SW4, and by a parallel RC type filter network F parallel-connected to Zener diode Z. More specifically, Zener diode Z has the cathode connected to a first input terminal SWa of controlled switch SW1-SW4 via resistor R, and the anode connected to a second input terminal SWb of controlled switch SW1-SW4. The second input terminal SWb of controlled switch SW1-SW4 is in turn connected to the emitter terminals of transistors IGBT1, IGBT2 of controlled switch SW1-SW4, and the intermediate node between resistor R and Zener diode Z is connected to the gate terminals of transistors IGBT1, IGBT2 of the respective controlled switch SW1-SW4.                        
During the package production process, control stage 22 measures the phase between the voltage and current from signal source 12, determines the total capacitance required of impedance matching circuit 11 to eliminate or minimize the phase, and then generates appropriate control signals for capacitive modules 21.1-21.4 to obtain an on/off configuration of transistors IGBT1, IGBT2, and hence a parallel-connection configuration of capacitors C1-C4 of variable-capacitance stage 21, which modifies the total capacitance “seen” by signal source 12 by such a quantity as to eliminate the phase between the voltage and current supplied by signal source 12.
Moreover, during a period of the alternating power signal, the capacitors C1-C4 of variable-capacitance stage 21 which are selectively connected between first and second line 23, 24, parallel to capacitors C5-C7 of fixed-capacitance stage 26, are each supplied with current which flows through the corresponding transistor IGBT1 and the freewheeling diode D2 of the corresponding transistor IGBT2 during the positive half-wave of the alternating power signal, and through the corresponding transistor IGBT2 and the freewheeling diode D1 of the corresponding transistor IGBT1 during the negative half-wave of the alternating power signal.